LM3S1651 Datasheet, PDF (1002/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

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DMAPCellID1, type RO, offset 0xFF4, reset 0x0000.00F0
DMAPCellID2, type RO, offset 0xFF8, reset 0x0000.0005
CID1
DMAPCellID3, type RO, offset 0xFFC, reset 0x0000.00B1
CID2
CID3
General-Purpose Input/Outputs (GPIOs)
GPIO Port A (APB) base: 0x4000.4000
GPIO Port A (AHB) base: 0x4005.8000
GPIO Port B (APB) base: 0x4000.5000
GPIO Port B (AHB) base: 0x4005.9000
GPIO Port C (APB) base: 0x4000.6000
GPIO Port C (AHB) base: 0x4005.A000
GPIO Port D (APB) base: 0x4000.7000
GPIO Port D (AHB) base: 0x4005.B000
GPIO Port E (APB) base: 0x4002.4000
GPIO Port E (AHB) base: 0x4005.C000
GPIO Port F (APB) base: 0x4002.5000
GPIO Port F (AHB) base: 0x4005.D000
GPIO Port G (APB) base: 0x4002.6000
GPIO Port G (AHB) base: 0x4005.E000
GPIO Port H (APB) base: 0x4002.7000
GPIO Port H (AHB) base: 0x4005.F000
GPIO Port J (APB) base: 0x4003.D000
GPIO Port J (AHB) base: 0x4006.0000
GPIODATA, type R/W, offset 0x000, reset 0x0000.0000 (see page 419)
GPIODIR, type R/W, offset 0x400, reset 0x0000.0000 (see page 420)
DATA
DIR
GPIOIS, type R/W, offset 0x404, reset 0x0000.0000 (see page 421)
IS
GPIOIBE, type R/W, offset 0x408, reset 0x0000.0000 (see page 422)
IBE
GPIOIEV, type R/W, offset 0x40C, reset 0x0000.0000 (see page 423)
IEV
GPIOIM, type R/W, offset 0x410, reset 0x0000.0000 (see page 424)
IME
GPIORIS, type RO, offset 0x414, reset 0x0000.0000 (see page 425)
RIS
GPIOMIS, type RO, offset 0x418, reset 0x0000.0000 (see page 426)
MIS
GPIOICR, type W1C, offset 0x41C, reset 0x0000.0000 (see page 428)
IC
GPIOAFSEL, type R/W, offset 0x420, reset - (see page 429)
AFSEL
1002
Texas Instruments-Production Data
January 21, 2012