LM3S1651 Datasheet, PDF(14/1033 Page) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

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LM3S1651 Datasheet, PDF (14/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

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Table of Contents

Table 8-3.

Table 8-4.

Table 8-5.

Table 8-6.

Table 8-7.

Table 8-8.

Table 8-9.

Table 8-10.

Table 8-11.

Table 8-12.

Table 8-13.

Table 9-1.

Table 9-2.

Table 9-3.

Table 9-4.

Table 9-5.

Table 9-6.

Table 9-7.

Table 9-8.

Table 9-9.

Table 9-10.

Table 9-11.

Table 9-12.

Table 10-1.

Table 10-2.

Table 10-3.

Table 10-4.

Table 10-5.

Table 10-6.

Table 10-7.

Table 10-8.

Table 10-9.

Table 10-10.

Table 10-11.

Table 11-1.

Table 12-1.

Table 12-2.

Table 12-3.

Table 12-4.

Table 12-5.

Table 13-1.

Table 13-2.

Table 13-3.

Table 13-4.

Table 14-1.

Table 14-2.

Table 14-3.

Control Structure Memory Map ........................................................................... 352

Channel Control Structure .................................................................................. 352

Î¼DMA Read Example: 8-Bit Peripheral ................................................................ 361

Î¼DMA Interrupt Assignments .............................................................................. 362

Channel Control Structure Offsets for Channel 30 ................................................ 363

Channel Control Word Configuration for Memory Transfer Example ...................... 363

Channel Control Structure Offsets for Channel 7 .................................................. 364

Channel Control Word Configuration for Peripheral Transmit Example .................. 365

Primary and Alternate Channel Control Structure Offsets for Channel 8 ................. 366

Channel Control Word Configuration for Peripheral Ping-Pong Receive

Example ............................................................................................................ 367

Î¼DMA Register Map .......................................................................................... 368

GPIO Pins With Non-Zero Reset Values .............................................................. 406

GPIO Pins and Alternate Functions (100LQFP) ................................................... 406

GPIO Pins and Alternate Functions (108BGA) ..................................................... 408

GPIO Pad Configuration Examples ..................................................................... 414

GPIO Interrupt Configuration Example ................................................................ 415

GPIO Pins With Non-Zero Reset Values .............................................................. 416

GPIO Register Map ........................................................................................... 416

GPIO Pins With Non-Zero Reset Values .............................................................. 429

GPIO Pins With Non-Zero Reset Values .............................................................. 435

GPIO Pins With Non-Zero Reset Values .............................................................. 437

GPIO Pins With Non-Zero Reset Values .............................................................. 440

GPIO Pins With Non-Zero Reset Values .............................................................. 447

Available CCP Pins ............................................................................................ 462

General-Purpose Timers Signals (100LQFP) ....................................................... 463

General-Purpose Timers Signals (108BGA) ......................................................... 464

General-Purpose Timer Capabilities .................................................................... 465

Counter Values When the Timer is Enabled in Periodic or One-Shot Modes .......... 466

16-Bit Timer With Prescaler Configurations ......................................................... 467

Counter Values When the Timer is Enabled in RTC Mode .................................... 468

Counter Values When the Timer is Enabled in Input Edge-Count Mode ................. 469

Counter Values When the Timer is Enabled in Input Event-Count Mode ................ 470

Counter Values When the Timer is Enabled in PWM Mode ................................... 471

Timers Register Map .......................................................................................... 476

Watchdog Timers Register Map .......................................................................... 511

ADC Signals (100LQFP) .................................................................................... 535

ADC Signals (108BGA) ...................................................................................... 536

Samples and FIFO Depth of Sequencers ............................................................ 537

Differential Sampling Pairs ................................................................................. 544

ADC Register Map ............................................................................................. 553

UART Signals (100LQFP) .................................................................................. 615

UART Signals (108BGA) .................................................................................... 615

Flow Control Mode ............................................................................................. 620

UART Register Map ........................................................................................... 626

SSI Signals (100LQFP) ...................................................................................... 679

SSI Signals (108BGA) ........................................................................................ 679

SSI Register Map .............................................................................................. 690

14

January 21, 2012

Texas Instruments-Production Data

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