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LM3S1651 Datasheet, PDF (918/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark
Signal Tables
Table 21-3. Signals by Signal Name (continued)
Pin Name
CCP6
CCP7
Fault0
Fault1
Fault2
Fault3
GND
GNDA
Pin Number Pin Mux / Pin
Assignment
10
PD0 (6)
12
PD2 (2)
75
PE1 (5)
86
PH0 (1)
91
PB5 (3)
11
PD1 (6)
13
PD3 (2)
85
PH1 (1)
90
PB6 (2)
96
PE3 (5)
6
PE4 (4)
16
PG3 (8)
17
PG2 (4)
39
PJ2 (10)
58
PF4 (4)
65
PB3 (2)
75
PE1 (3)
83
PH3 (2)
99
PD6 (1)
37
PG6 (8)
40
PG5 (5)
41
PG4 (4)
42
PF7 (9)
90
PB6 (4)
16
PG3 (4)
24
PC5 (4)
63
PH5 (10)
65
PB3 (4)
84
PH2 (4)
9
fixed
21
33
45
54
57
69
82
94
4
fixed
Pin Type
I/O
I/O
I
I
I
I
-
-
HIB
I2C0SCL
I2C0SDA
I2C1SCL
51
fixed
O
72
PB2 (1)
I/O
65
PB3 (1)
I/O
14
PJ0 (11)
I/O
19
PG0 (3)
26
PA0 (8)
34
PA6 (1)
Buffer Typea Description
TTL
Capture/Compare/PWM 6.
TTL
Capture/Compare/PWM 7.
TTL
PWM Fault 0.
TTL
PWM Fault 1.
TTL
PWM Fault 2.
TTL
PWM Fault 3.
Power Ground reference for logic and I/O pins.
Power
OD
OD
OD
OD
The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
An output that indicates the processor is in
Hibernate mode.
I2C module 0 clock.
I2C module 0 data.
I2C module 1 clock.
918
January 21, 2012
Texas Instruments-Production Data