LM3S1651 Datasheet, PDF (335/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Stellaris^® LM3S1651 Microcontroller
Register 14: Boot Configuration (BOOTCFG), offset 0x1D0
Note: Offset is relative to System Control base address of 0x400FE000.
This register provides configuration of a GPIO pin to enable the ROM Boot Loader as well as a
write-once mechanism to disable external debugger access to the device. Upon reset, the user has
the opportunity to direct the core to execute the ROM Boot Loader or the application in Flash memory
by using any GPIO signal from Ports A-H as configured by the bits in this register. If the EN bit is
set or the specified pin does not have the required polarity, the system control module checks
address 0x000.0004 to see if the Flash memory has a valid reset vector. If the data at address
0x0000.0004 is 0xFFFF.FFFF, then it is assumed that the Flash memory has not yet been
programmed, and the core executes the ROM Boot Loader. The DBG0 bit (bit 0) is set to 0 from
the factory and the DBG1 bit (bit 1) is set to 1, which enables external debuggers. Clearing the
DBG1 bit disables any external debugger access to the device permanently, starting with the next
power-up cycle of the device. The NW bit (bit 31) indicates that the register has not yet been
committed and is controlled through hardware to ensure that the register is only committed once.
Prior to being committed, bits can only be changed from 1 to 0. The reset value shown only applies
to power-on reset; any other type of reset does not affect this register. Once committed, the only
way to restore the factory default value of this register is to perform the sequence detailed in
“Recovering a "Locked" Microcontroller” on page 174.
Boot Configuration (BOOTCFG)
Base 0x400F.E000
Offset 0x1D0
Type R/W, reset 0xFFFF.FFFE
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
NW
reserved
Type R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PORT
PIN
POL
EN
reserved
DBG1 DBG0
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
R/W
R/W
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
Bit/Field
31
30:16
Name
NW
reserved
Type
R/W
RO
Reset Description
1
Not Written
When set, this bit indicates that this 32-bit register has not been
committed. When clear, this bit specifies that this register has been
committed and may not be committed again.
0x7FFF
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
January 21, 2012
335
Texas Instruments-Production Data