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LM3S1651 Datasheet, PDF (243/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark
Stellaris® LM3S1651 Microcontroller
Register 24: Device Capabilities 7 (DC7), offset 0x028
This register is predefined by the part and can be used to verify uDMA channel features. A 1 indicates
the channel is available on this device; a 0 that the channel is only available on other devices in the
family. Most channels have primary and secondary assignments. If the primary function is not
available on this microcontroller, the secondary function becomes the primary function. If the
secondary function is not available, the primary function is the only option.
Device Capabilities 7 (DC7)
Base 0x400F.E000
Offset 0x028
Type RO, reset 0xFFFF.FFFF
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved DMACH30 DMACH29 DMACH28 DMACH27 DMACH26 DMACH25 DMACH24 DMACH23 DMACH22 DMACH21 DMACH20 DMACH19 DMACH18 DMACH17 DMACH16
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DMACH15 DMACH14 DMACH13 DMACH12 DMACH11 DMACH10 DMACH9 DMACH8 DMACH7 DMACH6 DMACH5 DMACH4 DMACH3 DMACH2 DMACH1 DMACH0
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Bit/Field
31
30
29
28
27
26
Name
reserved
DMACH30
DMACH29
DMACH28
DMACH27
DMACH26
Type
RO
RO
RO
RO
RO
RO
Reset
1
1
1
1
1
1
Description
Reserved
Reserved for uDMA channel 31.
SW
When set, indicates uDMA channel 30 is available for software transfers.
I2S0_TX / CAN1_TX
When set, indicates uDMA channel 29 is available and connected to
the transmit path of I2S module 0. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of CAN module 1 transmit.
I2S0_RX / CAN1_RX
When set, indicates uDMA channel 28 is available and connected to
the receive path of I2S module 0. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of CAN module 1 receive.
CAN1_TX / ADC1_SS3
When set, indicates uDMA channel 27 is available and connected to
the transmit path of CAN module 1. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of ADC module 1 Sample Sequencer
3.
CAN1_RX / ADC1_SS2
When set, indicates uDMA channel 26 is available and connected to
the receive path of CAN module 1. If the corresponding bit in the
DMACHASGN register is set, the channel is connected instead to the
secondary channel assignment of ADC module 1 Sample Sequencer
2.
January 21, 2012
243
Texas Instruments-Production Data