LM3S1651 Datasheet, PDF (26/1033 Pages) Texas Instruments – ARM and Thumb are registered trademarks and Cortex is a trademark

Table of Contents
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PWM0 Control (PWM0CTL), offset 0x040 ....................................................................... 843
PWM1 Control (PWM1CTL), offset 0x080 ....................................................................... 843
PWM2 Control (PWM2CTL), offset 0x0C0 ....................................................................... 843
PWM0 Interrupt and Trigger Enable (PWM0INTEN), offset 0x044 ..................................... 848
PWM1 Interrupt and Trigger Enable (PWM1INTEN), offset 0x084 ..................................... 848
PWM2 Interrupt and Trigger Enable (PWM2INTEN), offset 0x0C4 .................................... 848
PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 ..................................................... 851
PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 ..................................................... 851
PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8 .................................................... 851
PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ............................................ 853
PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ............................................ 853
PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC ............................................ 853
PWM0 Load (PWM0LOAD), offset 0x050 ........................................................................ 855
PWM1 Load (PWM1LOAD), offset 0x090 ........................................................................ 855
PWM2 Load (PWM2LOAD), offset 0x0D0 ....................................................................... 855
PWM0 Counter (PWM0COUNT), offset 0x054 ................................................................. 856
PWM1 Counter (PWM1COUNT), offset 0x094 ................................................................. 856
PWM2 Counter (PWM2COUNT), offset 0x0D4 ................................................................ 856
PWM0 Compare A (PWM0CMPA), offset 0x058 .............................................................. 857
PWM1 Compare A (PWM1CMPA), offset 0x098 .............................................................. 857
PWM2 Compare A (PWM2CMPA), offset 0x0D8 .............................................................. 857
PWM0 Compare B (PWM0CMPB), offset 0x05C ............................................................. 858
PWM1 Compare B (PWM1CMPB), offset 0x09C ............................................................. 858
PWM2 Compare B (PWM2CMPB), offset 0x0DC ............................................................. 858
PWM0 Generator A Control (PWM0GENA), offset 0x060 ................................................. 859
PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ................................................. 859
PWM2 Generator A Control (PWM2GENA), offset 0x0E0 ................................................. 859
PWM0 Generator B Control (PWM0GENB), offset 0x064 ................................................. 862
PWM1 Generator B Control (PWM1GENB), offset 0x0A4 ................................................. 862
PWM2 Generator B Control (PWM2GENB), offset 0x0E4 ................................................. 862
PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ................................................. 865
PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8 ................................................. 865
PWM2 Dead-Band Control (PWM2DBCTL), offset 0x0E8 ................................................. 865
PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C .............................. 866
PWM1 Dead-Band Rising-Edge Delay (PWM1DBRISE), offset 0x0AC .............................. 866
PWM2 Dead-Band Rising-Edge Delay (PWM2DBRISE), offset 0x0EC .............................. 866
PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070 .............................. 867
PWM1 Dead-Band Falling-Edge-Delay (PWM1DBFALL), offset 0x0B0 .............................. 867
PWM2 Dead-Band Falling-Edge-Delay (PWM2DBFALL), offset 0x0F0 .............................. 867
PWM0 Fault Source 0 (PWM0FLTSRC0), offset 0x074 .................................................... 868
PWM1 Fault Source 0 (PWM1FLTSRC0), offset 0x0B4 .................................................... 868
PWM2 Fault Source 0 (PWM2FLTSRC0), offset 0x0F4 .................................................... 868
PWM0 Fault Source 1 (PWM0FLTSRC1), offset 0x078 .................................................... 870
PWM1 Fault Source 1 (PWM1FLTSRC1), offset 0x0B8 .................................................... 870
PWM2 Fault Source 1 (PWM2FLTSRC1), offset 0x0F8 .................................................... 870
PWM0 Minimum Fault Period (PWM0MINFLTPER), offset 0x07C ..................................... 873
PWM1 Minimum Fault Period (PWM1MINFLTPER), offset 0x0BC ..................................... 873
PWM2 Minimum Fault Period (PWM2MINFLTPER), offset 0x0FC ..................................... 873
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January 21, 2012
Texas Instruments-Production Data