SM320C6414-EP_16 Datasheet, PDF (88/93 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

SM320C6414-EP, SM320C6415-EP, SM320C6416-EP
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SGUS043D – MAY 2003 – REVISED SEPTEMBER 2008
www.ti.com
5.15.1 Timing Requirements for GPIO Inputs^{(1) (2)} (see Figure 5-48)
NO.
–50xEP
UNIT
MIN
MAX
1
t_w(GPIH)
2
t_w(GPIL)
Pulse duration, GPIx high 8P
Pulse duration, GPIx low 8P
8P
ns
8P
ns
(1) P = 1/CPU clock frequency in ns. For example, when running parts at 500 MHz, use P = 2 ns.
(2) The pulse width given is sufficient to generate a CPU interrupt or an EDMA event. However, if a user wants to have the DSP recognize
the GPIx changes through software polling of the GPIO register, the GPIx duration must be extended to at least 12P to allow the DSP
enough time to access the GPIO register through the CFGBUS.
NO.
PARAMETER
3
t_w(GPOH)
4
t_w(GPOL)
Pulse duration, GPOx high
Pulse duration, GPOx low
–50xEP
MIN
MAX
32P
32P
UNIT
ns
ns
GPIx
GPOx
2
1
4
3
Figure 5-49. GPIO Port Timing
5.16 JTAG TEST PORT TIMING
5.16.1 Timing Requirements for JTAG Test Port (see Figure 5-50)
NO.
1
t_c(TCK)
3
t_{su(TDIV-TCKH)}
4
t_h(TCKH-TDIV)
NO.
2
t_d(TCKL-TDOV)
Cycle time, TCK
Setup time, TDI/TMS/TRST valid before TCK high
Hold time, TDI/TMS/TRST valid after TCK high
PARAMETER
Delay time, TCK low to TDO valid
TCK
TDO
TDI/TMS/TRST
1
2
4
3
Figure 5-50. JTAG Test Port Timing
5.16.3 Thermal Resistance Characteristics (S-PBGA Package)
–50xEP
MIN MAX
35
10
9
UNIT
ns
ns
ns
–50xEP
MIN MAX
–3
18
UNIT
ns
2
88
PARAMETER MEASUREMENT INFORMATION
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