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SM320C6414-EP_16 Datasheet, PDF (28/93 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS
SM320C6414-EP, SM320C6415-EP, SM320C6416-EP
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SGUS043D – MAY 2003 – REVISED SEPTEMBER 2008
UTOPIA (SLAVE) [C6415 and C6416 Only]
URDATA7
URDATA6
URDATA5
URDATA4
URDATA3
URDATA2
URDATA1
URDATA0
Receive
Transmit
URENB
CLKX1/URADDR4†
CLKS1/URADDR3†
CLKR1/URADDR2†
URADDR1
URADDR0
URCLAV
URSOC
URCLK
Control/Status
Control/Status
Clock
Clock
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UXDATA7
UXDATA6
UXDATA5
UXDATA4
UXDATA3
UXDATA2
UXDATA1
UXDATA0
UXENB
DX1/UXADDR4†
FSX1/UXADDR3†
FSR1/UXADDR2†
DR1/UXADDR1†
UXADDR0
UXCLAV
UXSOC
UXCLK
TOUT1
TINP1
TOUT2
TINP2
Timer 1
Timer 2
Timer 0
Timers
TOUT0
TINP0
† For the C6415 and C6416 devices, these UTOPIA pins are MUXed with the McBSP1 peripheral. By default, these signals function as
McBSP1. For more details on these MUXed pins, see the Device Configurations section of this data sheet.
For the C6414 device, these McBSP1 peripheral pins are not MUXed; the C6414 does not support the UTOPIA peripheral.
Figure 1-6. Peripheral Signals (4)
Contents
1 Introduction ............................................... 1
1.1 Features .............................................. 1
1.2 SUPPORTS DEFENSE, AEROSPACE, AND
MEDICAL APPLICATIONS ........................... 2
1.3 Description............................................ 2
1.4 Ball-Grid Array (BGA) Package ...................... 3
1.4.1 Device Characteristics ............................... 4
1.4.2 Device Compatiblity .................................. 5
1.4.3 Functional Block and CPU (DSP Core) Diagram ... 6
1.4.4 CPU (DSP Core) Description ........................ 7
1.4.5 Memory Map Summary............................. 10
1.4.6 Peripheral Register Descriptions ................... 11
1.4.7 EDMA Channel Synchronization Events ........... 21
1.4.8 Interrupt Sources and Interrupt Selector............ 23
1.4.9 Signal Groups Description .......................... 24
2 Device Configurations................................. 30
2.1 Peripherals Selection................................ 30
2.2 Other Device Configurations ........................ 31
2.3 Multiplexed Pins ..................................... 33
2.4 Debugging Considerations .......................... 33
2.5 Terminal Functions .................................. 35
28
Contents
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