SM320C6414-EP_16 Datasheet, PDF (52/93 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

SM320C6414-EP, SM320C6415-EP, SM320C6416-EP
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SGUS043D – MAY 2003 – REVISED SEPTEMBER 2008
5 PARAMETER MEASUREMENT INFORMATION
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The load capacitance value stated is only for characterization and measurement of ac timing signals. This
load capacitance value does not indicate the maximum load the device is capable of driving.
2 pF
Output
Under
Test
Figure 5-1. AC Timing Reference Circuit for AC Timing Measurements
5.1 Signal Transition Levels
All input and output timing parameters are referenced to 1.5 V for both 0 and 1 logic levels.
V_ref = 1.5 V
Figure 5-2. Input and Output Voltage Reference Levels for AC Timing Measurements
All rise and fall transition timing parameters are referenced to V_IL MAX and V_IH MIN for input clocks, V_OL
MAX and V_OH MIN for output clocks, V_ILP MAX and V_IHP MIN for PCI input clocks, and V_OLP MAX and
V_OHP MIN for PCI output clocks.
V_ref = V_IH MIN (or V_OH MIN or
V_IHP MIN or V_OHP MIN)
V_ref = V_IL MAX (or V_OL MAX or
V_ILP MAX or V_OLP MAX)
Figure 5-3. Rise and Fall Transition Time Voltage Reference Levels
5.2 Signal Transition Rates
All timings are tested with an input edge rate of 4 V per nanosecond (4 V/ns).
5.3 Timing Parameters and Board Routing Analysis
The timing parameter values specified in this data sheet do not include delays by board routing. As a good
board design practice, such delays must always be taken into account. Timing values may be adjusted by
increasing/decreasing such delays. TI recommends utilizing the available I/O buffer information
specification (IBIS) models to analyze the timing characteristics correctly. If needed, external logic
hardware such as buffers may be used to compensate any timing differences.
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PARAMETER MEASUREMENT INFORMATION
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