SM320C6414-EP_16 Datasheet, PDF(20/93 Page) Texas Instruments

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SM320C6414-EP_16 Datasheet, PDF (20/93 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

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SM320C6414-EP, SM320C6415-EP, SM320C6416-EP

FIXED-POINT DIGITAL SIGNAL PROCESSORS

SGUS043D â MAY 2003 â REVISED SEPTEMBER 2008

www.ti.com

Table 1-22. UTOPIA Queue Registers (C6415 and C6416 Only)(1)

HEX ADDRESS

3C00 0000

3D00 0000

3D00 0004â3FFF FFFF

ACRONYM

URQ

UXQ

UTOPIA Receive Queue

UTOPIA Transmit Queue

Reserved

(1) These UTOPIA registers are not supported on the C6414 device.

Table 1-23. VCP Registers (C6414 Only)

HEX ADDRESS

EDMA BUS

PERIPHERAL BUS

5000 0000

01B8 0000

5000 0004

01B8 0004

5000 0008

01B8 0008

5000 000C

01B8 000C

5000 0010

01B8 0010

5000 0014

01B8 0014

5000 0040

01B8 0024

5000 0044

01B8 0028

5000 0080

5000 0088

01B8 0018

01B8 0020

01B8 0040

01B8 0044

01B8 0050

ACRONYM

VCPIC0

VCPIC1

VCPIC2

VCPIC3

VCPIC4

VCPIC5

VCPOUT0

VCPOUT1

VCPWBM

VCPRDECS

VCPEXE

VCPEND

VCPSTAT0

VCPSTAT1

VCPERR

VCP Input Configuration 0

VCP Input Configuration 1

VCP Input Configuration 2

VCP Input Configuration 3

VCP Input Configuration 4

VCP Input Configuration 5

VCP Output 0

VCP Output 1

VCP Write Branch Metrics

VCP Read Decisions

VCP Execution

VCP Endian

VCP Status Register 0

VCP Status Register 1

VCP Error

Table 1-24. TCP Registers (C6414 Only)

HEX ADDRESS

EDMA BUS

PERIPHERAL BUS

5800 0000

01BA 0000

5800 0004

01BA 0004

5800 0008

01BA 0008

5800 000C

01BA 000C

5800 0010

01BA 0010

5800 0014

01BA 0014

5800 0018

01BA 0018

5800 001C

01BA 001C

5800 0020

01BA 0020

5800 0024

01BA 0024

5800 0028

01BA 0028

5800 002C

01BA 002C

5800 0030

01BA 0030

5802 0000

5804 0000

5806 0000

5808 0000

580A 0000

01BA 0038

ACRONYM

TCPIC0

TCPIC1

TCPIC2

TCPIC3

TCPIC4

TCPIC5

TCPIC6

TCPIC7

TCPIC8

TCPIC9

TCPIC10

TCPIC11

TCPOUT

TCPSP

TCPEXT

TCPAP

TCPINTER

TCPHD

TCPEXE

TCP Input Configuration 0

TCP Input Configuration 1

TCP Input Configuration 2

TCP Input Configuration 3

TCP Input Configuration 4

TCP Input Configuration 5

TCP Input Configuration 6

TCP Input Configuration 7

TCP Input Configuration 8

TCP Input Configuration 9

TCP Input Configuration 10

TCP Input Configuration11

TCP Output Parameters

TCP Systematics and Parities Memory

TCP Extrinsic Memory

TCP Apriori Memory

TCP Interleaver Memory

TCP Hard Decisions Memory

TCP Execution

Introduction

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