SM320C6414-EP_16 Datasheet, PDF (83/93 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

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SM320C6414-EP, SM320C6415-EP, SM320C6416-EP
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SGUS043D – MAY 2003 – REVISED SEPTEMBER 2008
NO.
5 t_h(CKXL-DRV) Hold time, DR valid after CLKX low
–50xEP
MASTER
SLAVE
MIN MAX
MIN MAX
4
5 + 24P
UNIT
ns
NO.
PARAMETER
1
t_h(CKXL-FXL)
Hold time, FSX low after CLKX low⁽⁴⁾
2 t_d(FXL-CKXH) Delay time, FSX low to CLKX high⁽⁵⁾
3 t_d(CKXH-DXV) Delay time, CLKX high to DX valid
6 t_{dis(CKXL-DXHZ)} Disable time, DX high impedance following last data bit from
CLKX low
7 t_{dis(FXH-DXHZ)} Disable time, DX high impedance following last data bit from
FSX high
8
t_d(FXL-DXV)
Delay time, FSX low to DX valid
–50xEP
MASTER
SLAVE
MIN MAX
MIN
MAX
T–2 T+3
L–2 L+3
–2
4 12P + 20P + 17
2.8
L–2 L+3
UNIT
ns
ns
ns
ns
4P + 3 12P + 17 ns
8P + 1.8 16P + 17 ns
(3) S = Sample rate generator input clock = 4P if CLKSM = 1 (P = 1/CPU clock frequency)
= Sample rate generator input clock = P_clks if CLKSM = 0 (P_clks = CLKS period)
T = CLKX period = (1 + CLKGDV) × S
H = CLKX high pulse
width
= (CLKGDV/2 + 1) × S if CLKGDV is even
= (CLKGDV + 1)/2 × S if CLKGDV is odd or zero
L = CLKX low pulse width = (CLKGDV/2) × S if CLKGDV is even
= (CLKGDV + 1)/2 × S if CLKGDV is odd or zero
(4) FSRP = FSXP = 1. As a SPI Master, FSX is inverted to provide active-low slave-enable output. As a Slave,
the active-low signal input on FSX and FSR is inverted before being used internally.
CLKXM = FSXM = 1, CLKRM = FSRM = 0 for Master McBSP
CLKXM = CLKRM = FSXM = FSRM = 0 for Slave McBSPF
(5) FSX should be low before the rising edge of clock to enable Slave devices and then begin a SPI transfer at
the rising edge of the Master clock (CLKX).
CLKX
FSX
DX
DR
1
6
Bit 0
Bit 0
2
7
3
Bit(n-1)
(n-2)
(n-3)
(n-4)
4
5
Bit(n-1)
(n-2)
(n-3)
(n-4)
Figure 5-42. McBSP Timing as SPI Master or Slave: CLKSTP = 10b, CLKXP = 0
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PARAMETER MEASUREMENT INFORMATION
83