C8051F52X Datasheet, PDF (67/220 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x-53x
7. Voltage Regulator (REG0)
C8051F52x/F53x devices include an on-chip low dropout voltage regulator (REG0). The input to REG0 at
the V_REGIN pin can be as high as 5.25 V. The output can be selected by software to 2.1 V or 2.6 V. When
enabled, the output of REG0 appears on the V_DD pin, powers the microcontroller core, and can be used to
power external devices. On reset, REG0 is enabled and can be disabled by software.
The input (V_REGIN) and output (V_DD) of the voltage regulator should both be bypassed with a large capaci-
tor (4.7 µF + 0.1 µF) to ground. This capacitor will eliminate power spikes and provide any immediate
power required by the microcontroller. The settling time associated with the voltage regulator is shown in
Table 7.1.
The Voltage regulator can also generate an interrupt (if enabled by EREG0, EIE1.6) that is triggered when-
ever the Vregin Input voltage drops below the dropout threshold. (see Table 7.1)
This dropout interrupt has no pending flag and the recommended procedure to use it is as follows:
Step 1. Wait enough time to ensure the Vregin input voltage is stable
Step 2. Enable the dropout interrupt (EREG0, EIE1.6) and select the proper priority (PREG0,
PIE1.6)
Step 3. If triggered, inside the interrupt disable it (clear EREG0, EIE1.6), execute all procedures
necessary to protect your application (put it in a safe mode and leave the interrupt now
disabled.
Step 4. In the main application, now running in the safe mode, regularly checks the DROPOUT bit
(REG0CN.0). Once it is cleared by the regulator hardware the application can enable the
interrupt again (EREG0, EIE1.6) and return to the normal mode operation.
REG0
4.7 µF
V_DD
4.7 µF
VREGIN
.1 µF
V_DD
.1 µF
Figure 7.1. External Capacitors for Voltage Regulator Input/Output
Rev. 0.3
67