C8051F52X Datasheet, PDF (121/220 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x-53x
P0
SF Signals QFN10
PIN I/O
TX0
RX0
SCK
MISO
MOSI
NSS**
LIN-TX
LIN_RX
CP0
CP0A
/SYSCLK
CEX0
CEX1
CEX2
ECI
T0
T1
0 1 2 3 4* 5*
000000
P0SKIP[0:5]
*Note: Refer to Section “21. Revision Specific Behavior” on page 215.
**Note: 4-Wire SPI Only.
Figure 14.5. Crossbar Priority Decoder with No Pins Skipped (QFN 10)
Rev. 0.3
121