C8051F52X Datasheet, PDF (32/220 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x-53x
Table 4.1. Pin Definitions for the C8051F520 (QFN 10) (Continued)
Name
P0.3
Pin
Type Description
D I/O or _{Port 0.3. See Port I/O Section for a complete description.}
A In
XTAL2
P0.2
8
D I/O _{External Clock Output. For an external crystal or resonator, this pin is}
the excitation driver. This pin is the external clock input for CMOS,
capacitor, or RC oscillator configurations. See Section “15. Oscillators”
on page 133.
D I/O or _{Port 0.2. See Port I/O Section for a complete description.}
XTAL1
P0.1/
9
A In _{External Clock Input. This pin is the external oscillator return for a crys-}
tal or resonator. Section “15. Oscillators” on page 133.
D I/O or _{Port 0.1. See Port I/O Section for a complete description.}
A In
10
C2D
D I/O ^{Bi-directional data signal for the C2 Debug Interface}
*Note: Please refer to Section “21. Revision Specific Behavior” on page 215.
32
Rev. 0.3