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C8051F52X Datasheet, PDF (157/220 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family
C8051F52x-53x
SFR Definition 17.12. LINCTRL: LIN Control Register
W
STOP
Bit7
W
SLEEP
Bit6
W
TXRX
Bit5
R/W
DTACK
Bit4
R/W
RSTINT
Bit3
R/W
R/W
R/W
Reset Value
RSTERR WUPREQ STREQ 00000000
Bit2
Bit1
Bit0
SFR
Address:
0x08
(indirect)
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
STOP: Blocks processing of LIN communications (slave mode only).
This bit is to be set by the application to block the processing of the LIN Communications
until the next SYNCH BREAK signal. It is used when the application is handling a data
request interrupt and cannot use the frame content with the received identifier (always reads
‘0’).
SLEEP: Sleep Mode Warning.
This bit is to be set by the application to warn the peripheral that a Sleep Mode Frame was
received and that the Bus is in sleep mode or if a Bus Idle timeout interrupt is requested.
The application must reset it when a Wake-Up interrupt is requested.
TXRX: Transmit/Receive Selection Bit.
This bit is to be set by the application to select if the current frame is a transmit frame or a
receive frame.
1 - Transmit Operation
0 - Receive Operation
DTACK: Data acknowledge bit.(slave mode only)
This bit is to be set by the application after handling a data request interrupt (reset by the
peripheral.)
RSTINT: Interrupt Reset bit.
This bit must be set by the application to reset the “INT” bit in the LINST (LIN Status Regis-
ter).
RSTERR: Error Reset Bit
The application must set this bit in order to reset the error bits in the LINST (LIN Status Reg-
ister) and the LINERR (LIN Error Register) bits.
WUPREQ: Wake-Up Request Bit.
This bit must be set by the application to end the sleep mode of the LIN bus by sending a
Wake-Up Signal. (reset by the peripheral)
STREQ: Start Request Bit.(master mode only)
This bit must be set by the application to start a LIN transmission. It may be done only after
loading the identifier, data length and data buffer.(reset by the peripheral upon completion of
the transmission or error detection).
LIN Mode Selection Status of the
Peripheral
Event
Result
Slave (LINCF.6 = 0)
Slave (LINCF.6 = 0)
Sleeping
Sleeping
Wake-Up Pulse Received WAKEUP Bit Set (LINST.1 = 1)
Valid Frame Received
DONE Bit Set (LINST.0 = 1)
Master (LINCF.6 = 1) Sleeping Wake-Up Pulse Received
Rev. 0.3
157