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C8051F52X Datasheet, PDF (60/220 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family
C8051F52x-53x
Table 5.1. ADC0 Electrical Characteristics (VDD = 2.6 V, VREF = 1.5 V)
VDD = 2.6 V, VREF = 1.5 V (REFSL=0), –40 to +125 °C unless otherwise specified.
Parameter
Conditions
Min Typ Max Units
DC Accuracy
Resolution
12
bits
Integral Nonlinearity
C8051F52x/C8051F53x
devices
—
—
±1
LSB
Differential Nonlinearity
Guaranteed Monotonic
—
—
±1
LSB
Offset Error
—
±1
—
LSB
Full Scale Error
—
±1
—
LSB
Dynamic Performance (10 kHz sine-wave Single-ended input, 0 to 1 dB below Full Scale, 200 ksps)
Signal-to-Noise Plus Distortion
C8051F52x/C8051F53x
devices
68
—
—
64
—
—
dB
Total Harmonic Distortion
Up to the 5th harmonic
—
76
—
dB
Spurious-Free Dynamic Range
—
91
—
dB
Conversion Rate
SAR Conversion Clock
—
—
10
MHz
Conversion Time in SAR Clocks1
—
13
—
clocks
Track/Hold Acquisition Time2
1
—
—
µs
Throughput Rate
—
—
200
ksps
Analog Inputs
Input Voltage Range3
0
— 4.6 or 2.3 V
Input Capacitance
—
12
—
pF
Temperature Sensor
Linearity4,5
—
0.1
—
°C
Gain4,5
— 2.89
—
mV/°C
Offset4,5
(Temp = 25 °C)
— 888
—
mV
Power Specifications
Power Supply Current
(VDD supplied to ADC)
Operating Mode, 200 ksps
— 840
—
µA
Burst Mode (Idle)
— 880
—
µA
Power Supply Rejection
—
1
—
mV/V
Notes:
1. An additional 2 FCLK cycles are required to start and complete a conversion.
2. Additional tracking time may be required depending on the output impedance connected to the ADC input.
See Section “5.3.6. Settling Time Requirements” on page 48.
3. The maximum input voltage is 2.3 V without attenuation and 4.6 V with attenuation when using the internal
reference. If an external reference is used then the input is limited to the external reference value.
4. Represents one standard deviation from the mean.
5. Includes ADC offset, gain, and linearity variations.
60
Rev. 0.3