C8051F52X Datasheet, PDF (201/220 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x-53x
20.2. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: Edge-triggered
Capture, Software Timer, High Speed Output, Frequency Output, 8-Bit Pulse Width Modulator, or 16-Bit
Pulse Width Modulator. Each module has Special Function Registers (SFRs) associated with it in the CIP-
51 system controller. These registers are used to exchange data with a module and configure the module's
mode of operation.
Table 20.2 summarizes the bit settings in the PCA0CPMn registers used to select the PCA capture/com-
pare module’s operating modes. Setting the ECCFn bit in a PCA0CPMn register enables the module's
CCFn interrupt. Note: PCA0 interrupts must be globally enabled before individual CCFn interrupts are rec-
ognized. PCA0 interrupts are globally enabled by setting the EA bit and the EPCA0 bit to logic 1. See
Figure 20.3 for details on the PCA interrupt configuration.
Table 20.2. PCA0CPM Register Settings for PCA Capture/Compare Modules
PWM16 ECOM CAPP CAPN
X
X
1
0
X
X
0
1
X
X
1
1
X
1
0
0
X
1
0
0
X
1
0
0
0
1
0
0
1
1
0
0
X = Don’t Care
MAT
0
0
0
1
1
X
X
X
TOG
0
0
0
0
1
1
0
0
PWM ECCF
Operation Mode
0
X
Capture triggered by positive edge on
CEXn
0
X
Capture triggered by negative edge on
CEXn
0
X
Capture triggered by transition on
CEXn
0
X Software Timer
0
X High Speed Output
1
X Frequency Output
1
X 8-Bit Pulse Width Modulator
1
X 16-Bit Pulse Width Modulator
(for n = 0 to 5)
PCA0CPMn
P ECCMT P E
WCA A AOWC
MOP P TGMC
1 MPN n n n F
6nnn
n
n
PCA Counter/
Timer Overflow
PCA0CN
CC
CCC
FR
CCC
FFF
210
PCA0MD
C
CCCE
I
PPPC
D
SSSF
L
210
0
1
PCA Module 0
(CCF0)
PCA Module 1
(CCF1)
PCA Module 2
(CCF2)
ECCF0
0
1
ECCF1
0
1
ECCF2
0
1
EPCA0
(EIE1.4)
EA
(IE.7)
0
1
0
Interrupt
Priority
1
Decoder
Figure 20.3. PCA Interrupt Block Diagram
Rev. 0.3
201