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C8051F52X Datasheet, PDF (63/220 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family
C8051F52x-53x
6. Voltage Reference
The Voltage reference MUX on C8051F52x/F53x devices is configurable to use an externally connected
voltage reference, the internal reference voltage generator, or the VDD power supply voltage (see
Figure 6.1). The REFSL bit in the Reference Control register (REF0CN) selects the reference source. For
an external source or the internal reference applied to the VREF pin, REFSL should be set to ‘0’. To use
VDD as the reference source, REFSL should be set to ‘1’.
The BIASE bit enables the internal voltage bias generator, which is used by the ADC, Temperature Sensor,
and internal oscillators. This bit is forced to logic 1 when any of the aforementioned peripherals are
enabled. The bias generator may be enabled manually by writing a ‘1’ to the BIASE bit in register
REF0CN; see SFR Definition 6.1 for REF0CN register details. The electrical specifications for the voltage
reference circuit are given in Table 6.1.
The internal voltage reference circuit consists of a temperature stable bandgap voltage reference genera-
tor and a gain-of-two output buffer amplifier. The output voltage is selectable between 1.5 V and 2.25 V.
The internal voltage reference can be driven out on the VREF pin by setting the REFBE bit in register
REF0CN to a ‘1’ (see Figure 6.1). The load seen by the VREF pin must draw less than 200 µA to GND.
When using the internal voltage reference, bypass capacitors of 0.1 µF and 4.7 µF are recommended from
the VREF pin to GND. If the internal reference is not used, the REFBE bit should be cleared to ‘0’. Electrical
specifications for the internal voltage reference are given in Table 6.1.
REF0CN
VDD
R1
External
Voltage
Reference
Circuit
VREF
GND
IOSCEN
EN Bias Generator
EN Temp Sensor
0
VDD 1
REFBE
EN
Internal
Reference
To ADC,
Internal Oscillators
To Analog Mux
VREF
(to ADC)
REFLV
Figure 6.1. Voltage Reference Functional Block Diagram
Rev. 0.3
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