C8051F52X Datasheet, PDF (136/220 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x-53x
SFR Definition 15.2. OSCICL: Internal Oscillator Calibration
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
-
OSCICL
Varies
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address: 0xB3
Bit7: UNUSED. Read = 0. Write = don’t care.
Bits 6–0: OSCICL: Internal Oscillator Calibration Register.
This register determines the internal oscillator period. On C8051F52x/53x devices, the reset
value is factory calibrated to generate an internal oscillator frequency of 24.5 MHz.
SFR Definition 15.3. OSCIFIN: Internal Fine Oscillator Calibration
R/W
R/W
R/W
R
R
R/W
R/W
R/W
Reset Value
-
-
OSCIFIN
undetermined
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit Addressable
SFR Address: 0xB0
Bit7–6: UNUSED. Read = 00b, Write = don't care.
Bit5–0: OSCIFIN. Internal oscillator fine adjustment bits. The valid range is between 0x00 and 0x27.
This register is a fine adjustment for the internal oscillator period. On C8051F52x/53x devices, the
reset value is factory calibrated to generate an internal oscillator frequency of 24.5 MHz.
136
Rev. 0.3