C8051F52X Datasheet, PDF (57/220 Pages) Silicon Laboratories – 8/4/2 kB ISP Flash MCU Family

C8051F52x-53x
5.5. Selectable Attenuation
The C8051F52x/F53x family of devices implements an ADC that provides a new and innovative selectable
attenuation option. This option allows the designer to take the ADC Input and either keep its input value
unchanged or attenuate by a factor of 2 (value divided by two).
The attenuation selection is performed using the following steps:
Step 1. Set the ATTEN bit (ADC0CF.0)
Step 2. Load the ADC0H with 0x04
Step 3. Load ADC0L with 0xFC if no attenuation (1/1 gain) is required or 0x7C to attenuate the
signal (1/2 gain)
Step 4. Reset the ATTEN bit (ADC0CF.0)
Notes:
1. During the Attenuation selection no ADC conversion should be performed as the results will be incorrect.
2. The maximum input voltage value is still limited to Vregin and the maximum value of the signal after attenuation
is limited to Vref otherwise the ADC will saturate.
5.6. Typical ADC Parameters and Description
5.6.1. Resolution
The resolution of an ADC is defined as 2ⁿ, where 'n' is the number of bits of the ADC. It shows the number
of different states or codes the ADC digital output can assume (or resolve) from the analog input. For
example, a 12-bit ADC presents 2¹² or 4096 values.
In principle the higher the number of symbols the better is the resolution of the ADC.
5.6.2. Integral Non-Linearity (INL)
The Integral Non-Linearity (INL) of an ADC informs how much the transfer function of the ADC deviates
from the ideal linear (straight line) function. The value is obtained by measuring the maximum deviation of
the output compared with the straight line. (in LSBs or least significant bits). A typical value would be
±1LSB.
Measurement
To obtain these values the following steps are performed:
1. A number of samples of different production lots that is large enough to ensure statistical sig-
nificance are selected.
2. The samples are tested by injecting a precise analog signal sweeping the best straight line
through the entire ADC range. (The best straight line is calculated so that to minimize the devi-
ations using a least square curve fitting)
3. The maximum deviation from the transition point (offset errors and gain errors eliminated) is
calculated for each sample.
5.6.3. Differential Non-Linearity (DNL)
The Differential Non-Linearity shows the maximum distance between one symbol and the next one in
LSBs. A DNL of less than ±1 LSB guarantees that there are no missing codes. This means that if the input
voltage is swept its entire range then all code combinations will appear in the output of the converter. Many
ADCs define the DNL as ±1LSB but still guarantee that there are no missing codes. This happens because
the production test limits are tighter than the data sheet limits. If the DNL is greater than ±1LSB then the
device has missing codes.
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