HD64336900G Datasheet, PDF (76/408 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

3.2.2 Interrupt Edge Select Register 2 (IEGR2)
IEGR2 selects the direction of an edge that generates interrupt requests of the ADTRG and WKP5
pins.
Initial
Bit
Bit Name Value R/W Description
7, 6 
All 1

Reserved
These bits are always read as 1.
5
WPEG5 0
R/W WKP5 Edge Select
0: Falling edge of WKP5 (ADTRG) pin input is detected
1: Rising edge of WKP5 (ADTRG) pin input is detected
4 to 0 
All 0

Reserved
These bits are always read as 0.
3.2.3 Interrupt Enable Register 1 (IENR1)
IENR1 enables direct transition interrupts and external pin interrupts.
Initial
Bit
Bit Name Value R/W Description
7
IENDT
0
R/W Direct Transfer Interrupt Enable
When this bit is set to 1, direct transition interrupt
requests are enabled.
6

0

Reserved
This bit is always read as 0.
5
IENWP 0
R/W Wakeup Interrupt Enable
This bit is an enable bit of the WKP5 pin. When this bit is
set to 1, interrupt requests are enabled.
4

1

Reserved
This bit is always read as 1.
3
IEN3
0
R/W IRQ3 Interrupt Enable
When this bit is set to 1, interrupt requests of the IRQ3
pin are enabled.
2, 1 
All 0

Reserved
These bits are always read as 0.
0
IEN0
0
R/W IRQ0 Interrupt Enable
When this bit is set to 1, interrupt requests of the IRQ0
pin are enabled.
Rev. 1.00, 11/03, page 48 of 376