HD64336900G Datasheet, PDF (201/408 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

12.5.2 Output Compare Output Timing
The compare match signal is generated in the last state in which TCNT and GR match (when
TCNT changes from the matching value to the next value). When the compare match signal is
generated, the output value selected in TIOR is output at the compare match output pin (FTIOA,
FTIOB, FTIOC, or FTIOD).
When TCNT matches GR, the compare match signal is generated only after the next counter clock
pulse is input.
Figure 12.16 shows the output compare timing.
TCNT input
clock
TCNT
N
N+1
GRA to GRD
N
Compare
match signal
FTIOA to FTIOD
Figure 12.16 Output Compare Output Timing
Rev. 1.00, 11/03, page 173 of 376