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HD64336900G Datasheet, PDF (52/408 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series | |||
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Table 2.3 Arithmetic Operations Instructions (2)
Instruction Size* Function
DIVXS
B/W
Rd ÷ Rs â Rd
Performs signed division on data in two general registers: either 16 bits ÷
8 bits â 8-bit quotient and 8-bit remainder or 32 bits ÷ 16 bits â 16-bit
quotient and 16-bit remainder.
CMP
B/W/L
Rd â Rs, Rd â #IMM
Compares data in a general register with data in another general register
or with immediate data, and sets CCR bits according to the result.
NEG
B/W/L
0 â Rd â Rd
Takes the two's complement (arithmetic complement) of data in a
general register.
EXTU
W/L
Rd (zero extension) â Rd
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by padding with zeros on the
left.
EXTS
W/L
Rd (sign extension) â Rd
Extends the lower 8 bits of a 16-bit register to word size, or the lower 16
bits of a 32-bit register to longword size, by extending the sign bit.
Note: * Refers to the operand size.
B: Byte
W: Word
L: Longword
Table 2.4 Logic Operations Instructions
Instruction Size* Function
AND
B/W/L
Rd ⧠Rs â Rd, Rd ⧠#IMM â Rd
Performs a logical AND operation on a general register and another
general register or immediate data.
OR
B/W/L Rd ⨠Rs â Rd, Rd ⨠#IMM â Rd
Performs a logical OR operation on a general register and another
general register or immediate data.
XOR
B/W/L
Rd â Rs â Rd, Rd â #IMM â Rd
Performs a logical exclusive OR operation on a general register and
another general register or immediate data.
NOT
B/W/L ¬ (Rd) â (Rd)
Takes the one's complement of general register contents.
Note: * Refers to the operand size.
B: Byte
W: Word
L: Longword
Rev. 1.00, 11/03, page 24 of 376
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