HD64336900G Datasheet, PDF (223/408 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Initial
Bit
Bit Name Value R/W Description
3
PER
0
R/W Parity Error
[Setting condition]
• When a parity error is detected during reception
[Clearing condition]
2
TEND
1
• When 0 is written to PER after reading PER = 1
R
Transmit End
[Setting conditions]
• When the TE bit in SCR3 is 0
• When TDRE = 1 at transmission of the last bit of a 1-
frame serial transmit character
[Clearing conditions]
• When 0 is written to TDRE after reading TDRE = 1
1
MPBR
0
• When the transmit data is written to TDR
R
Multiprocessor Bit Receive
MPBR stores the multiprocessor bit in the receive
character data. When the RE bit in SCR3 is cleared to 0,
its state is retained.
0
MPBT
0
R/W Multiprocessor Bit Transfer
MPBT stores the multiprocessor bit to be added to the
transmit character data.
Rev. 1.00, 11/03, page 195 of 376