HD64336900G Datasheet, PDF (193/408 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

TCNT value
GRA
H'0000
CTS bit
IMFA
Flag cleared
by software
Time
Figure 12.3 Periodic Counter Operation
By setting a general register as an output compare register, compare match A, B, C, or D can cause
the output at the FTIOA, FTIOB, FTIOC, or FTIOD pin to output 0, output 1, or toggle. Figure
12.4 shows an example of 0 and 1 output when TCNT operates as a free-running counter, 1 output
is selected for compare match A, and 0 output is selected for compare match B. When signal is
already at the selected output level, the signal level does not change at compare match.
TCNT value
H'FFFF
GRA
GRB
H'0000
FTIOA
FTIOB
No change
Time
No change
No change
No change
Figure 12.4 0 and 1 Output Example (TOA = 0, TOB = 1)
Figure 12.5 shows an example of toggle output when TCNT operates as a free-running counter,
and toggle output is selected for both compare match A and B.
Rev. 1.00, 11/03, page 165 of 376