HD64336900G Datasheet, PDF (305/408 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Operating Procedures for Enabling/Disabling LVDR and LVDI Circuits:
The low-voltage detection circuit is enabled after reset. To enable or disable the low-voltage
detection circuit correctly, follow the procedure described below. Figure 17.7 shows the timing for
the operation and release of the low-voltage detection circuit.
1. To disable the low-voltage detection circuit, clear all of the LVDRE, LVDDE, and LVDUE
bits to 0. Then, clear the LVDE and BGRE bits to 0. Set the VDDII bit in LVDCR if
necessary. The LVDE and BGRE bits must not be cleared to 0 at the same timing as the
LVDRE, LVDDE, and LVDUE bits because incorrect operation may occur.
2. To enable the low-voltage detection circuit, set the LVDE and BGRE bits in LVDCR to 1.
When the voltages input on the ExtU and ExtD pins are used as the compared voltage, clear
the LVDDII bit to 0.
3. Wait for 50 µs (t_LVDON) given by a software timer until the reference voltage and the low-
voltage-detection power supply have settled. Then, clear the LVDDF and LVDUF bits in
LVDSR to 0 and set the LVDRE, LVDDE, and LVDUE bits in LVDCR to 1, if necessary.
LVDE
BGRE
VDDII
LVDRE
LVDDE
LVDUE
Longer than one instruction operation time
tLVDON
Figure 17.7 Timing for Enabling/Disabling of Low-Voltage Detection Circuit
Rev. 1.00, 11/03, page 277 of 376