HD64336900G Datasheet, PDF (25/408 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

Tables
Section 1 Overview
Table 1.1 Pin Functions ................................................................................................................9
Section 2 CPU
Table 2.1 Operation Notation......................................................................................................21
Table 2.2 Data Transfer Instructions...........................................................................................22
Table 2.3 Arithmetic Operations Instructions (1) .......................................................................23
Table 2.3 Arithmetic Operations Instructions (2) .......................................................................24
Table 2.4 Logic Operations Instructions .....................................................................................24
Table 2.5 Shift Instructions.........................................................................................................25
Table 2.6 Bit Manipulation Instructions (1)................................................................................26
Table 2.6 Bit Manipulation Instructions (2)................................................................................27
Table 2.7 Branch Instructions .....................................................................................................28
Table 2.8 System Control Instructions........................................................................................29
Table 2.9 Block Data Transfer Instructions ................................................................................29
Table 2.10 Addressing Modes ..................................................................................................31
Table 2.11 Absolute Address Access Ranges ...........................................................................32
Table 2.12 Effective Address Calculation (1) ...........................................................................34
Table 2.12 Effective Address Calculation (2) ...........................................................................35
Section 3 Exception Handling
Table 3.1 Exception Sources and Vector Address ......................................................................45
Table 3.2 Interrupt Wait States ...................................................................................................56
Section 4 Address Break
Table 4.1 Access and Data Bus Used..........................................................................................61
Section 5 Clock Pulse Generators
Table 5.1 Crystal Resonator Parameters .......................................................................................80
Section 6 Power-Down Modes
Table 6.1 Operating Frequency and Wait Time..........................................................................85
Table 6.2 Transition Mode after SLEEP Instruction Execution and Interrupt Handling ............89
Table 6.3 Internal State in Each Operating Mode.......................................................................90
Section 7 ROM
Table 7.1 Setting Programming Modes ......................................................................................99
Table 7.2 Boot Mode Operation ...............................................................................................101
Table 7.3 System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate is
Possible ..................................................................................................................... 102
Table 7.4 Reprogram Data Computation Table ........................................................................105
Table 7.5 Additional-Program Data Computation Table ..........................................................105
Table 7.6 Programming Time ...................................................................................................105
Rev. 1.00, 11/03, page xxv of xxviii