HD64336900G Datasheet, PDF (222/408 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

14.3.7 Serial Status Register (SSR)
SSR is a register containing status flags of SCI3 and multiprocessor bits for transfer. 1 cannot be
written to flags TDRE, RDRF, OER, PER, and FER; they can only be cleared.
Initial
Bit
Bit Name Value R/W Description
7
TDRE
1
R/W Transmit Data Register Empty
Indicates whether TDR contains transmit data.
[Setting conditions]
• When the TE bit in SCR3 is 0
• When data is transferred from TDR to TSR
[Clearing conditions]
6
RDRF
0
• When 0 is written to TDRE after reading TDRE = 1
• When the transmit data is written to TDR
R/W Receive Data Register Full
Indicates that the received data is stored in RDR.
[Setting condition]
• When serial reception ends normally and receive data
is transferred from RSR to RDR
[Clearing conditions]
• When 0 is written to RDRF after reading RDRF = 1
5
OER
0
• When data is read from RDR
R/W Overrun Error
[Setting condition]
• When an overrun error occurs in reception
[Clearing condition]
4
FER
0
• When 0 is written to OER after reading OER = 1
R/W Framing Error
[Setting condition]
• When a framing error occurs in reception
[Clearing condition]
• When 0 is written to FER after reading FER = 1
Rev. 1.00, 11/03, page 194 of 376