HD64336900G Datasheet, PDF (100/408 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

5.3.1 Clock Control Operation
The LSI system clock is generated by the internal RC clock after a reset. The internal RC clock is
switched to the external clock by the user software. Figure 5.3 shows the flowchart to switch
clocks with the external oscillator backup function enabled. Figures 5.4 and 5.5 show the
flowcharts to switch clocks with the external oscillator backup function disabled.
LSI operates on internal RC clock
[1] External oscillation starts when pins PC1 and
PC0 are selected as external oscillation pins.
Start (reset)
Write 0 to bit PMRC1 to input the external clock.
[2] The external oscillation halt detection circuit is
enabled when the external oscillation backup
function is enabled. Since this detection circuit
operates on the internal RC clock, do not set the
Write 1 to PMRC0 in CKCSR
Write 1 to PMRC1 in CKCSR
[1]
internal RC oscillator to standby mode by using
the RCSTP bit in RCCR.
[3] An interrupt to switch the internal RC clock to the
external clock is enabled.
[4] After writing 1 to the OSCSEL bit, this LSI waits
Write 1 to OSCBAKE in CKCSR ^[2]
until the oscillation of the external oscillator
settles. The correspondence between Nwait,
which is the number of wait cycles for oscillation
settling, and Nstby, which is the number of wait
cycles for oscillation settling when returning from
Clear CKSWIE in CKCSR to 0
standby mode, is as follows:
Nstby ≤ Nwait ≤ 2 × Nstby
Nstby is set by bits STS[2:0] in SYSCR1.
For details, see section 6.1.1, System Control
Write 1 to CKSWIE in CKCSR ^[3]
Register 1 (SYSCR1).
[5] While waiting for external oscillation settling, this
LSI is not halted but continues to operate on the
internal RC clock. Read the CKSTA bit in
CKCSR to ensure whether or not clocks are
Write 1 to OSCSEL in CKCSR ^[4]
switched. When the oscillation settles, this LSI
switches the system clock to the external clock.
If the external oscillation is in a halted state, then
set the clock switch interrupt request flag.
[6] If this LSI detects the external oscillation halt, it
[5]
switches the system clock to the internal clock,
Switched to
No
external clock? (CKSTA in
CKCSR is 1)
Yes
and sets the clock switch interrupt request flag.
External
oscillation halt
is detected
LSI operates on
internal RC clock
[6]
LSI operates on external oscillator
External oscillation
halt is detected
Exceptional handling
for clock switching
Figure 5.3 Flowchart of Clock Switching with Backup Function Enabled
Rev. 1.00, 11/03, page 72 of 376