HD64336900G Datasheet, PDF (104/408 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

φOSC
φRC
φ
OSCSEL
PHISTOP
(Internal signal)
CKSTA
CKSWIF
External RC clock operation
φ halt*
Wait for external
oscillation settling
Nwait
External clock
operation
[Legend]
φOSC: External clock
φRC:
φ:
Internal RC clock
System clock
OSCSEL: Bit 4 in CKCSR
PHISTOP: System clock stop control signal
CKSTA: Bit 0 in CKCSR
CKSWIF: Bit 2 in CKCSR
Note: * The φ halt duration is the duration from the timing when the φ clock stops to the
seventh rising edge of the φ_RC clock.
Figure 5.7 Timing Chart to Switch External Clock to Internal RC Clock
Rev. 1.00, 11/03, page 76 of 376