HD64336900G Datasheet, PDF (246/408 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series

14.6.2 Multiprocessor Serial Data Reception
Figure 14.18 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in
SCR3 is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data
with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is
generated at this time. All other SCI3 operations are the same as those in asynchronous mode.
Figure 14.19 shows an example of SCI3 operation for multiprocessor format reception.
Rev. 1.00, 11/03, page 218 of 376