MC68HC08AB16A Datasheet, PDF (48/380 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Memory Map
Freescale Semiconductor, Inc.
Addr.
Register Name
Bit 7
6
5
4
3
2
1
$001E
PLL Programming ^Read:
Register Write:
(PPG) _Reset:
MUL7
0
MUL6
1
MUL5
1
MUL4
0
VRS7
0
VRS6
1
VRS5
1
Read: LVISTOP SEC LVIRSTD LVIPWRD SSREC COPRS STOP
$001F
Mask Option Register A
(MORA)^†
Write:
Reset:
Unaffected by reset; mask option
† Hard-wired register, specified during ROM code submission.
Timer A Status and ^{Read: TOF}
TOIE TSTOP
0
0
$0020
Control Register Write: 0
TRST
(TASC) _{Reset: 0}
0
1
0
0
PS2
PS1
0
0
Keyboard Interrupt Enable ^{Read: 0}
0
0
KBIE4 KBIE3 KBIE2 KBIE1
$0021
Register Write:
(KBIER) _{Reset: 0}
0
0
0
0
0
0
$0022
Timer A Counter ^{Read: Bit 15}
14
13
12
11
10
9
Register High Write:
(TACNTH) _{Reset: 0}
0
0
0
0
0
0
Timer A Counter ^{Read: Bit 7}
6
5
4
3
2
1
$0023
Register Low Write:
(TACNTL) _{Reset: 0}
0
0
0
0
0
0
Timer A Counter Modulo ^Read: _{Bit 15}
14
13
12
11
10
9
$0024
Register High Write:
(TAMODH) _{Reset: 1}
1
1
1
1
1
1
Timer A Counter Modulo ^Read: _{Bit 7}
6
5
4
3
2
1
$0025
Register Low Write:
(TAMODL) _{Reset: 1}
1
1
1
1
1
1
Timer A Channel 0 Status ^Read:
$0026 and Control Register Write:
(TASC0) _Reset:
CH0F
0
0
CH0IE
0
MS0B
0
MS0A
0
ELS0B ELS0A
0
0
TOV0
0
Timer A Channel 0 ^Read: _{Bit 15}
14
13
12
11
10
9
$0027
Register High Write:
(TACH0H) _Reset:
Indeterminate after reset
= Unimplemented
R = Reserved
Bit 0
VRS4
0
COPD
PS0
0
KBIE0
0
Bit 8
0
Bit 0
0
Bit 8
1
Bit 0
1
CH0MAX
0
Bit 8
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 11)
Technical Data
48
MC68HC08AB16A — Rev. 2.0
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