MC68HC08AB16A Datasheet, PDF (130/380 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Clock Generator Module (CGM)
and require fast start-up. The following conditions apply when in manual
mode:
• ACQ is a writable control bit that controls the mode of the filter.
Before turning on the PLL in manual mode, the ACQ bit must be
clear.
• Before entering tracking mode (ACQ = 1), software must wait a
given time, t_ACQ (see 9.10 Acquisition/Lock Time
Specifications), after turning on the PLL by setting PLLON in the
PLL control register (PCTL).
• Software must wait a given time, t_AL, after entering tracking mode
before selecting the PLL as the clock source to CGMOUT
(BCS = 1).
• The LOCK bit is disabled.
• CPU interrupts from the CGM are disabled.
9.4.2.4 Programming the PLL
The following procedure shows how to program the PLL.
NOTE: The round function in the following equations means that the real
number should be rounded to the nearest integer number.
1. Choose the desired bus frequency, f_BUSDES.
2. Calculate the desired VCO frequency (four times the desired bus
frequency).
f_VCLKDES = 4 × f_BUSDES
3. Choose a practical PLL reference frequency, f_RCLK.
4. Select a VCO frequency multiplier, N.
N
=
r
ou
nd


f--_{V---fC--R--L-C-K--L-D--K-E---S- }
Technical Data
130
MC68HC08AB16A — Rev. 2.0
Clock Generator Module (CGM)
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