MC68HC08AB16A Datasheet, PDF (348/380 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Computer Operating Properly (COP)
20.4.5 Internal Reset
An internal reset clears the COP prescaler and the COP counter.
20.4.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
20.4.7 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the
mask option register A. (See Figure 20-2.)
20.4.8 COPRS (COP Rate Select)
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the mask option register A. (See Figure 20-2.)
Address: $001F
Bit 7
6
5
4
3
2
1
Read: LVISTOP SEC LVIRSTD LVIPWRD SSREC COPRS STOP
Write:
Reset:
Unaffected by reset
Figure 20-2. Mask Option Register A (MORA)
Bit 0
COPD
COPRS — COP Rate Select Bit
COPRS selects the COP timeout period. Reset clears COPRS.
1 = COP timeout period = 2¹⁸ – 2⁴ CGMXCLK cycles
0 = COP timeout period = 2¹³ – 2⁴ CGMXCLK cycles
COPD — COP Disable Bit
COPD disables the COP module.
1 = COP module disabled
0 = COP module enabled
Technical Data
348
MC68HC08AB16A — Rev. 2.0
Computer Operating Properly (COP)
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