MC68HC08AB16A Datasheet, PDF (202/380 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Timer Interface Module B (TIMB)
12.10 I/O Registers
The following I/O registers control and monitor operation of the TIMB:
• TIMB status and control register (TBSC)
• TIMB counter registers (TBCNTH:TBCNTL)
• TIMB counter modulo registers (TBMODH:TBMODL)
• TIMB channel status and control registers (TBSC0, TBSC1,
TBSC2, and TBSC3)
• TIMB channel registers (TBCH0H:TBCH0L, TBCH1H:TBCH1L,
TBCH2H:TBCH2L, and TBCH3H:TBCH3L)
12.10.1 TIMB Status and Control Register
The TIMB status and control register does the following:
• Enables TIMB overflow interrupts
• Flags TIMB overflows
• Stops the TIMB counter
• Resets the TIMB counter
• Prescales the TIMB counter clock
Address: $0040
Bit 7
6
5
4
3
2
1
Bit 0
Read: TOF
0
0
TOIE TSTOP
Write: 0
TRST
PS2
PS1
PS0
Reset: 0
0
1
0
0
0
0
0
= Unimplemented
Figure 12-4. TIMB Status and Control Register (TBSC)
Technical Data
202
MC68HC08AB16A — Rev. 2.0
Timer Interface Module B (TIMB)
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