MC68HC08AB16A Datasheet, PDF (312/380 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Input/Output (I/O) Ports
When DDRBx is a logic 1, reading address $0001 reads the PTBx data
latch. When DDRBx is a logic 0, reading address $0001 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
Table 17-3 summarizes the operation of the port B pins.
Table 17-3. Port B Pin Functions
DDRB
Bit
0
PTB Bit
X⁽¹⁾
I/O Pin Mode
Input, Hi-Z⁽²⁾
Accesses to DDRB
Read/Write
DDRB[7:0]
1
X
Output
DDRB[7:0]
Notes:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
Accesses to PTB
Read
Pin
Write
PTB[7:0]⁽³⁾
PTB[7:0] PTB[7:0]
17.5 Port C
Port C is a 6-bit general-purpose bidirectional I/O port. PTC2 pin can be
configured as an output pin for the system MCLK clock.
17.5.1 Port C Data Register (PTC)
The port C data register contains a data latch for each of the six port C
pins.
Address: $0002
Bit 7
6
5
4
3
2
Read: 0
Write:
0
PTC5 PTC4 PTC3 PTC2
Reset:
Unaffected by reset
Alternative Function:
MCLK
Figure 17-8. Port C Data Register (PTC)
1
PTC1
Bit 0
PTC0
Technical Data
312
MC68HC08AB16A — Rev. 2.0
Input/Output (I/O) Ports
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