MC68HC08AB16A Datasheet, PDF (197/380 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Timer Interface Module B (TIMB)
Functional Description
12.5.4.2 Buffered PWM Signal Generation
Channels 0 and 1 can be linked to form a buffered PWM channel
whose output appears on the PTF4/TBCH0 pin. The TIMB channel
registers of the linked pair alternately control the pulse width of the
output.
Setting the MS0B bit in TIMB channel 0 status and control register
(TBSC0) links channel 0 and channel 1. The TIMB channel 0 registers
initially control the pulse width on the PTF4/TBCH0 pin. Writing to the
TIMB channel 1 registers enables the TIMB channel 1 registers to
synchronously control the pulse width at the beginning of the next
PWM period. At each subsequent overflow, the TIMB channel registers
(0 or 1) that control the pulse width are the ones written to last. TBSC0
controls and monitors the buffered PWM function, and TIMB channel 1
status and control register (TBSC1) is unused. While the MS0B bit is
set, the channel 1 pin, PTF5/TBCH1, is available as a general-purpose
I/O pin.
Channels 2 and 3 can be linked to form a buffered PWM channel
whose output appears on the PTF2/TBCH2 pin. The TIMB channel
registers of the linked pair alternately control the pulse width of the
output.
Setting the MS2B bit in TIMB channel 2 status and control register
(TBSC2) links channel 2 and channel 3. The TIMB channel 2 registers
initially control the pulse width on the PTF2/TBCH2 pin. Writing to the
TIMB channel 3 registers enables the TIMB channel 3 registers to
synchronously control the pulse width at the beginning of the next
PWM period. At each subsequent overflow, the TIMB channel registers
(2 or 3) that control the pulse width are the ones written to last. TBSC2
controls and monitors the buffered PWM function, and TIMB channel 3
status and control register (TBSC3) is unused. While the MS2B bit is
set, the channel 3 pin, PTF3/TBCH3, is available as a general-purpose
I/O pin.
NOTE:
In buffered PWM signal generation, do not write new pulse width values
to the currently active channel registers. Writing to the active channel
registers is the same as generating unbuffered PWM signals.
MC68HC08AB16A — Rev. 2.0
MOTOROLA
Timer Interface Module B (TIMB)
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Technical Data
197