MC68HC08AB16A Datasheet, PDF (175/380 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Timer Interface Module A (TIMA)
I/O Signals
11.9 I/O Signals
Ports E and F each share two pins with the TIMA and port D shares one.
PTD6/TACLK is an external clock input to the TIMA prescaler. The four
TIMA channel I/O pins are PTE2/TACH0, PTE3/TACH1, PTF0/TACH2,
and PTF1/TACH3.
11.9.1 TIMA Clock Pin
PTD6/TACLK is an external clock input that can be the clock source for
the TIMA counter instead of the prescaled internal bus clock. Select the
PTD6/TACLK input by writing logic 1s to the three prescaler select bits,
PS[2:0]. See 11.10.1 TIMA Status and Control Register. The minimum
TACLK pulse width, TACLK_LMIN or TACLK_HMIN, is:
b----u---s-----f--r--e--1-q---u----e---n---c---y-- ^{+ tSU}
The maximum TACLK frequency is:
bus frequency ÷ 2
PTD6/TACLK is available as a general-purpose I/O pin when not used
as the TIMA clock input. When the PTD6/TACLK pin is the TIMA clock
input, it is an input regardless of the state of the DDRD6 bit in data
direction register D.
11.9.2 TIMA Channel I/O Pins
Each channel I/O pin is programmable independently as an input
capture pin or an output compare pin. PTF0/TACH2 and PTE3/TACH1
can be configured as buffered output compare or buffered PWM pins.
MC68HC08AB16A — Rev. 2.0
MOTOROLA
Timer Interface Module A (TIMA)
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Technical Data
175