MC68HC08AB16A Datasheet, PDF (273/380 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
Pin Name Conventions and I/O Register Addresses
16.4 Pin Name Conventions and I/O Register Addresses
The text that follows describes the SPI. The SPI I/O pin names are SS
(slave select), SPSCK (SPI serial clock), CGND (clock ground), MOSI
(master out slave in), and MISO (master in/slave out). The SPI shares
four I/O pins with four parallel I/O ports.
The full names of the SPI I/O pins are shown in Table 16-1. The generic
pin names appear in the text that follows.
Table 16-1. Pin Name Conventions
SPI Generic
Pin Names:
MISO
MOSI
SS
SPSCK CGND
Full SPI
Pin Names:
SPI
PTE5/MISO
PTE6/MOSI
PTE4/SS
PTE7/SPSCK
V_SS
16.5 Functional Description
Figure 16-1 summarizes the SPI I/O registers and Figure 16-2 shows
the structure of the SPI module.
Addr.
$0010
$0011
$0012
Register Name
Bit 7
6
5
4
3
2
1
Read:
SPI Control Register
(SPCR)
Write:
Reset:
SPRIE
0
R SPMSTR CPOL CPHA SPWOM SPE
0
1
0
1
0
0
Read:
SPI Status and Control
Register (SPSCR)
Write:
Reset:
SPRF
0
ERRIE
0
OVRF
0
MODF
0
SPTE
MODFEN SPR1
1
0
0
Read: R7
R6
R5
R4
R3
R2
R1
SPI Data Register
(SPDR)
Write:
T7
T6
T5
T4
T3
T2
T1
Reset:
Unaffected by reset
= Unimplemented
R = Reserved
Figure 16-1. SPI I/O Register Summary
Bit 0
SPTIE
0
SPR0
0
R0
T0
MC68HC08AB16A — Rev. 2.0
MOTOROLA
Serial Peripheral Interface Module (SPI)
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Technical Data
273