MC68HC08AB16A Datasheet, PDF (201/380 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Timer Interface Module B (TIMB)
I/O Signals
12.9 I/O Signals
Port F shares four pins with the TIMB and port D shares one.
PTD4/TBCLK is an external clock input to the TIMB prescaler. The four
TIMB channel I/O pins are PTF4/TBCH0, PTF5/TBCH1, PTF2/TBCH2,
and PTF3/TBCH3.
12.9.1 TIMB Clock Pin
PTD4/TBCLK is an external clock input that can be the clock source for
the TIMB counter instead of the prescaled internal bus clock. Select the
PTD4/TBCLK input by writing logic 1s to the three prescaler select bits,
PS[2:0]. See 12.10.1 TIMB Status and Control Register. The minimum
TBCLK pulse width, TBCLK_LMIN or TBCLK_HMIN, is:
b----u---s-----f--r--e--1-q---u----e---n---c---y-- ^{+ tSU}
The maximum TBCLK frequency is:
bus frequency ÷ 2
PTD4/TBCLK is available as a general-purpose I/O pin when not used
as the TIMB clock input. When the PTD4/TBCLK pin is the TIMB clock
input, it is an input regardless of the state of the DDRD6 bit in data
direction register D.
12.9.2 TIMB Channel I/O Pins
Each channel I/O pin is programmable independently as an input
capture pin or an output compare pin. PTF2/TBCH2 and PTF5/TBCH1
can be configured as buffered output compare or buffered PWM pins.
MC68HC08AB16A — Rev. 2.0
MOTOROLA
Timer Interface Module B (TIMB)
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Technical Data
201