MC68HC08AB16A Datasheet, PDF (166/380 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Timer Interface Module A (TIMA)
Addr.
Register Name
$002B
Timer A Channel 1 ^Read:
Register Low Write:
(TACH1L) _Reset:
Timer A Channel 2 Status ^Read:
$002C and Control Register Write:
(TASC2) _Reset:
$002D
Timer A Channel 2 ^Read:
Register High Write:
(TACH2H) _Reset:
$002E
Timer A Channel 2 ^Read:
Register Low Write:
(TACH2L) _Reset:
Timer A Channel 3 Status ^Read:
$002F and Control Register Write:
(TASC3) _Reset:
$0030
Timer A Channel 3 ^Read:
Register High Write:
(TACH3H) _Reset:
$0031
Timer A Channel 3 ^Read:
Register Low Write:
(TACH3L) _Reset:
Bit 7
Bit 7
CH2F
0
0
Bit 15
Bit 7
CH3F
0
0
Bit 15
Bit 7
6
5
4
3
2
6
5
4
3
2
Indeterminate after reset
CH2IE MS2B MS2A ELS2B ELS2A
0
0
0
0
0
14
13
12
11
10
Indeterminate after reset
6
5
4
3
2
CH3IE
Indeterminate after reset
0
MS3A ELS3B ELS3A
0
0
0
0
0
14
13
12
11
10
Indeterminate after reset
6
5
4
3
2
Indeterminate after reset
= Unimplemented
Figure 11-2. TIMA I/O Register Summary (Sheet 2 of 2)
1
Bit 0
1
Bit 0
TOV2 CH2MAX
0
0
9
Bit 8
1
Bit 0
TOV3 CH3MAX
0
0
9
Bit 8
1
Bit 0
11.5.2 Input Capture
With the input capture function, the TIMA can capture the time at which
an external event occurs. When an active edge occurs on the pin of an
input capture channel, the TIMA latches the contents of the TIMA
counter into the TIMA channel registers, TACHxH:TACHxL. The polarity
of the active edge is programmable. Input captures can generate
TIMA CPU interrupt requests.
Technical Data
166
MC68HC08AB16A — Rev. 2.0
Timer Interface Module A (TIMA)
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