PIC18F87J10 Datasheet, PDF (95/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

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7.7 8-bit Mode
In 8-bit Data Width mode, the external memory bus
operates only in Multiplexed mode; that is, data shares
the 8 Least Significant bits of the address bus.
Figure 7-6 shows an example of 8-bit Multiplexed
mode for 80-pin devices. This mode is used for a single
8-bit memory connected for 16-bit operation. The
instructions will be fetched as two 8-bit bytes on a
shared data/address bus. The two bytes are sequen-
tially fetched within one instruction cycle (TCY).
Therefore, the designer must choose external memory
devices according to timing calculations based on
1/2 TCY (2 times the instruction rate). For proper mem-
ory speed selection, glue logic propagation delay times
must be considered, along with setup and hold times.
The Address Latch Enable (ALE) pin indicates that the
address bits AD<15:0> are available on the external
memory interface bus. The Output Enable signal (OE)
will enable one byte of program memory for a portion of
the instruction cycle, then BA0 will change and the
second byte will be enabled to form the 16-bit instruc-
tion word. The Least Significant bit of the address, BA0,
must be connected to the memory devices in this
mode. The Chip Enable signal (CE) is active at any
time that the microcontroller accesses external
memory, whether reading or writing; it is inactive
(asserted high) whenever the device is in Sleep mode.
This generally includes basic EPROM and Flash
devices. It allows table writes to byte-wide external
memories.
During a TBLWT instruction cycle, the TABLAT data is
presented on the upper and lower bytes of the
AD15:AD0 bus. The appropriate level of the BA0
control line is strobed on the LSb of the TBLPTR.
FIGURE 7-6:
8-BIT MULTIPLEXED MODE EXAMPLE
D<7:0>
PIC18F8XJ10
AD<7:0>
ALE
AD<15:8>⁽¹⁾
A<19:16>⁽¹⁾
BA0
CE
OE
WRL
A<19:0>
373
D<15:8>
A<x:1>
A0
D<7:0>
CE
OE WR⁽²⁾
Address Bus
Data Bus
Control Lines
Note 1:
2:
Upper order address bits are only used 20-bit address width. The upper AD byte is used for all
address widths except 8-bit.
This signal only applies to table writes. See Section 6.1 “Table Reads and Table Writes”.
 2005 Microchip Technology Inc.
Advance Information
DS39663A-page 93