PIC18F87J10 Datasheet, PDF (18/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J10 FAMILY
TABLE 1-3: PIC18F6XJ10/6XJ15 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
TQFP
Type Type
Description
RG0/ECCP3/P3A
RG0
ECCP3
P3A
PORTG is a bidirectional I/O port.
3
I/O
ST
Digital I/O.
I/O
ST
Capture 3 input/Compare 3 output/PWM 3 output.
O
—
ECCP3 PWM output A.
RG1/TX2/CK2
RG1
TX2
CK2
4
I/O
ST
Digital I/O.
O
—
EUSART2 asynchronous transmit.
I/O
ST
EUSART2 synchronous clock (see related RX2/DT2).
RG2/RX2/DT2
RG2
RX2
DT2
5
I/O
ST
Digital I/O.
I
ST
EUSART2 asynchronous receive.
I/O
ST
EUSART2 synchronous data (see related TX2/CK2).
RG3/CCP4/P3D
RG3
CCP4
P3D
6
I/O
ST
Digital I/O.
I/O
ST
Capture 4 input/Compare 4 output/PWM 4 output.
O
—
ECCP3 PWM output D.
RG4/CCP5/P1D
RG4
CCP5
P1D
8
I/O
ST
Digital I/O.
I/O
ST
Capture 5 input/Compare 5 output/PWM 5 output.
O
—
ECCP1 PWM output D.
VSS
9, 25, 41, 56 P
— Ground reference for logic and I/O pins.
VDD
26, 38, 57
P
— Positive supply for peripheral digital logic and I/O pins.
AVSS
20
P
— Ground reference for analog modules.
AVDD
19
P
— Positive supply for analog modules.
ENVREG
18
I
ST Enable for on-chip voltage regulator.
VDDCORE/VCAP
VDDCORE
VCAP
10
Core logic power or external filter capacitor connection.
P
—
Positive supply for microcontroller core logic
(regulator disabled).
P
—
External filter capacitor connection (regulator enabled).
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
CMOS
Analog
O
OD
= CMOS compatible input or output
= Analog input
= Output
= Open-Drain (no P diode to VDD)
Note 1: Default assignment for ECCP2/P2A when configuration bit CCP2MX is set.
2: Alternate assignment for ECCP2/P2A when configuration bit CCP2MX is cleared.
DS39663A-page 16
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 2005 Microchip Technology Inc.