PIC18F87J10 Datasheet, PDF (55/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J10 FAMILY
TABLE 4-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
ECCP1DEL PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
TMR4
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
PR4
PIC18F6XJ1X PIC18F8XJ1X 1111 1111
1111 1111
1111 1111
T4CON
PIC18F6XJ1X PIC18F8XJ1X -000 0000
-000 0000
-uuu uuuu
CCPR4H
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR4L
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP4CON PIC18F6XJ1X PIC18F8XJ1X --00 0000
--00 0000
--uu uuuu
CCPR5H
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR5L
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP5CON PIC18F6XJ1X PIC18F8XJ1X --00 0000
--00 0000
--uu uuuu
SPBRG2
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
RCREG2
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
TXREG2
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
TXSTA2
PIC18F6XJ1X PIC18F8XJ1X 0000 0010
0000 0010
uuuu uuuu
RCSTA2
PIC18F6XJ1X PIC18F8XJ1X 0000 000x
0000 000x
uuuu uuuu
ECCP3AS
PIC18F6XJ1X PIC18F8XJ1X
0000 0000
0000 0000
uuuu uuuu
ECCP3DEL PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
ECCP2AS
PIC18F6XJ1X PIC18F8XJ1X
0000 0000
0000 0000
uuuu uuuu
ECCP2DEL PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
SSP2BUF
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
SSP2ADD
PIC18F6XJ1X PIC18F8XJ1X
0000 0000
0000 0000
uuuu uuuu
SSP2STAT PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
SSP2CON1 PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
SSP2CON2 PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 4-1 for Reset value for specific condition.
 2005 Microchip Technology Inc.
Advance Information
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