PIC18F87J10 Datasheet, PDF(184/394 Page) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

PIC18F87J10 Datasheet, PDF (184/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

◁

PIC18F87J10 FAMILY

TABLE 17-5: REGISTERS ASSOCIATED WITH ECCP MODULES AND TIMER1 TO TIMER4

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset

Values

on page

INTCON

GIE/GIEH PEIE/GIEL TMR0IE INT0IE

RBIE TMR0IF INT0IF RBIF

49

RCON

IPEN

â

â

RI

TO

PD

POR

BOR

50

PIR1

PSPIF

ADIF

RC1IF

TX1IF

SSP1IF CCP1IF TMR2IF TMR1IF

51

PIE1

PSPIE

ADIE

RC1IE

TX1IE

SSP1IE CCP1IE TMR2IE TMR1IE

51

IPR1

PSPIP

ADIP

RC1IP

TX1IP

SSP1IP CCP1IP TMR2IP TMR1IP

51

PIR2

OSCFIF

CMIF

â

â

BCL1IF

â

TMR3IF CCP2IF

51

PIE2

OSCFIE

CMIE

â

â

BCL1IE

â TMR3IE CCP2IE

51

IPR2

OSCFIP

CMIP

â

â

BCL1IP

â TMR3IP CCP2IP

51

PIR3

SSP2IF BCL2IF

RC2IF

TX2IF TMR4IF CCP5IF CCP4IF CCP3IF

51

PIE3

SSP2IE BCL2IE RC2IE

TX2IE TMR4IE CCP5IE CCP4IE CCP3IE

51

IPR3

SSP2IP BCL2IP RC2IP

TX2IP TMR4IP CCP5IP CCP4IP CCP3IP

51

TRISB

TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0

52

TRISC

TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0

52

TRISE

TRISE7 TRISE6 TRISE5 TRISE4 TRISE3 TRISE2 TRISE1 TRISE0

52

TRISG

â

â

â

TRISG4 TRISG3 TRISG2 TRISG1 TRISG0

52

TRISH

TRISH7 TRISH6 TRISH5 TRISH4 TRISH3 TRISH2 TRISH1 TRISH0

52

TMR1L

Timer1 Register Low Byte

50

TMR1H

Timer1 Register High Byte

50

T1CON

RD16

T1RUN T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 50

TMR2

Timer2 Register

50

T2CON

â

T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 50

PR2

Timer2 Period Register

50

TMR3L

Timer3 Register Low Byte

51

TMR3H

Timer3 Register High Byte

51

T3CON

RD16

T3CCP2 T3CKPS1 T3CKPS0 T3CCP1 T3SYNC TMR3CS TMR3ON

51

TMR4

Timer4 Register

53

T4CON

â

T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 53

PR4

Timer4 Period Register

CCPRxL(1) Capture/Compare/PWM Register x Low Byte

CCPRxH(1) Capture/Compare/PWM Register x High Byte

CCPxCON(1)

PxM1

PxM0

DCxB1 DCxB0

ECCPxAS(1) ECCPxASE ECCPxAS2 ECCPxAS1 ECCPxAS0

ECCPxDEL(1) PxRSEN PxDC6

PxDC5

PxDC4

CCPxM3

PSSxAC1

PxDC3

CCPxM2 CCPxM1 CCPxM0

PSSxAC0 PSSxBD1 PSSxBD0

PxDC2 PxDC1 PxDC0

53

51

51,

51

51, 53

53

Legend:

Note 1:

â = unimplemented, read as â0â. Shaded cells are not used during ECCP operation.

Generic term for all of the identical registers of this name for all Enhanced CCP modules, where âxâ identifies the

individual module (ECCP1, ECCP2 or ECCP3). Bit assignments and Reset values for all registers of the same

generic name are identical.

DS39663A-page 182

Advance Information

ï£© 2005 Microchip Technology Inc.

▷