PIC18F87J10 Datasheet, PDF (84/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

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6.2 Control Registers
Two control registers are used in conjunction with the
TBLRD and TBLWT instructions: the TABLAT register
and the TBLPTR register set.
6.2.1 TABLE LATCH REGISTER (TABLAT)
The Table Latch (TABLAT) is an 8-bit register mapped
into the SFR space. The Table Latch register is used to
hold 8-bit data during data transfers between the
program memory space and data RAM.
6.2.2
TABLE POINTER REGISTER
(TBLPTR)
The Table Pointer register (TBLPTR) addresses a byte
within the program memory. It is comprised of three
SFR registers: Table Pointer Upper Byte, Table Pointer
High Byte and Table Pointer Low Byte
(TBLPTRU:TBLPTRH:TBLPTRL). Only the lower six
bits of TBLPTRU are used with TBLPTRH and
TBLPTRL, to form a 22-bit wide pointer.
The contents of TBLPTR indicate a location in program
memory space. The low-order 21 bits allow the device
to address the full 2 Mbytes of program memory space.
The 22nd bit allows access to the configuration space,
including the device ID, user ID locations and the
configuration bits.
The TBLPTR register set is updated when executing a
TBLRD or TBLWT operation in one of four ways, based
on the instruction’s arguments. These are detailed in
Table 6-1. These operations on the TBLPTR only affect
the low-order 21 bits.
When a TBLRD or TBLWT is executed, all 22 bits of the
TBLPTR determine which address in the program
memory space is to be read or written to.
TABLE 6-1:
TABLE POINTER
OPERATIONS WITH TBLRD
AND TBLWT INSTRUCTIONS
Example
Operation on Table Pointer
TBLRD*
TBLWT*
TBLRD*+
TBLWT*+
TBLRD*-
TBLWT*-
TBLRD+*
TBLWT+*
TBLPTR is not modified
TBLPTR is incremented after the
read/write
TBLPTR is decremented after the
read/write
TBLPTR is incremented before the
read/write
6.3 Reading the Flash Program
Memory
The TBLRD instruction is used to retrieve data from the
program memory space and places it into data RAM.
Table reads from program memory are performed one
byte at a time.
TBLPTR points to a byte address in program space.
Executing TBLRD places the byte pointed to into
TABLAT.
The internal program memory is typically organized by
words. The Least Significant bit of the address selects
between the high and low bytes of the word. Figure 6-2
shows the interface between the internal program
memory and the TABLAT.
A typical method for reading data from program memory
is shown in Example 6-1.
FIGURE 6-2:
READS FROM PROGRAM MEMORY
Program Memory Space
(Even Byte Address) (Odd Byte Address)
Instruction Register
(IR)
FETCH
TBLPTR = xxxxx1
TBLPTR = xxxxx0
TBLRD
TABLAT
Read Register
DS39663A-page 82
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 2005 Microchip Technology Inc.