PIC18F87J10 Datasheet, PDF (59/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J10 FAMILY
5.1.3
PIC18F8XJ10/8XJ15 PROGRAM
MEMORY MODES
The 80-pin devices in this family can address up to a
total of 2 Mbytes of program memory. This is achieved
through the external memory bus. There are two
distinct operating modes available to the controllers:
• Microcontroller (MC)
• Extended Microcontroller (EMC)
The program memory mode is determined by setting
the EMB configuration bits (CONFIG3L<5:4>), as
shown in Register 5-1. (See also Section 23.1
“Configuration Bits” for additional details on the
device configuration bits.)
The program memory modes operate as follows:
• The Microcontroller Mode accesses only on-chip
Flash memory. Attempts to read above the top of
on-chip memory causes a read of all ‘0’s (a NOP
instruction).
The Microcontroller mode is also the only operating
mode available to 64-pin devices.
• The Extended Microcontroller Mode allows
access to both internal and external program
memories as a single block. The device can
access its entire on-chip program memory; above
this, the device accesses external program
memory up to the 2-Mbyte program space limit.
Execution automatically switches between the
two memories as required.
The setting of the EMB configuration bits also controls
the address bus width of the external memory bus. This
is covered in more detail in Section 7.0 “External
Memory Bus”.
In all modes, the microcontroller has complete access
to data RAM.
Figure 5-3 compares the memory maps of the different
program memory modes. The differences between
on-chip and external memory access limitations are
more fully explained in Table 5-2.
REGISTER 5-1: CONFIG3L: CONFIGURATION REGISTER 3 LOW
R/WO-1 R/WO-1 R/WO-0 R/WO-0 R/WO-0
U-0
U-0
U-0
WAIT
BW
EMB1 EMB0 EASHFT
—
—
—
bit 7
bit 0
bit 7
bit 6
bit 5-4
bit 3
bit 2-0
WAIT: External Bus Wait Enable bit
1 = Wait states on the external bus are disabled
0 = Wait states on the external bus are enabled and selected by MEMCON<5:4>
BW: Data Bus Width Select bit
1 = 16-Bit Data Width modes
0 = 8-Bit Data Width modes
EMB1:EMB0: External Memory Bus Configuration bits
11 = Extended Microcontroller mode, 20-bit address width for external bus
10 = Extended Microcontroller mode, 16-bit address width for external bus
01 = Extended Microcontroller mode, 12-bit address width for external bus
00 = Microcontroller mode, external bus disabled
EASHFT: External Address Bus Shift Enable bit
1 = Address shifting enabled – external address bus is shifted to start at 000000h
0 = Address shifting disabled – external address bus reflects the PC value
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value after erase
WO = Write-Once bit U = Unimplemented bit, read as ‘0’
’1’ = Bit is set
’0’ = Bit is cleared x = Bit is unknown
 2005 Microchip Technology Inc.
Advance Information
DS39663A-page 57