PIC18F87J10 Datasheet, PDF (194/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

PIC18F87J10 FAMILY
TABLE 18-2: REGISTERS ASSOCIATED WITH SPI™ OPERATION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF
PIR1
PSPIF
ADIF
RC1IF TX1IF SSP1IF CCP1IF
PIE1
PSPIE
ADIE
RC1IE TX1IE SSP1IE CCP1IE
IPR1
PSPIP
ADIP
RC1IP TX1IP SSP1IP CCP1IP
PIR3
SSP2IF BCL2IF RC2IF TX2IF TMR4IF CCP5IF
PIE3
SSP2IE BCL2IE RC2IE TX2IE TMR4IE CCP5IE
IPR3
TRISC
SSP2IP BCL2IP RC2IP TX2IP TMR4IP CCP5IP
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2
TRISD
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2
TRISF
TRISF7 TRISF6 TRISF5 TRISF4 TRISF3 TRISF2
SSP1BUF MSSP1 Receive Buffer/Transmit Register
SSP1CON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2
SSP1STAT SMP
CKE
D/A
P
S
R/W
SSP2BUF MSSP2 Receive Buffer/Transmit Register
SSP2CON1 WCOL SSPOV SSPEN CKP
SSPM3 SSPM2
SSP2STAT SMP
CKE
D/A
P
S
R/W
Legend: Shaded cells are not used by the MSSP module in SPI™ mode.
Bit 1
INT0IF
TMR2IF
TMR2IE
TMR2IP
CCP4IF
CCP4IE
CCP4IP
TRISC1
TRISD1
TRISF1
SSPM1
UA
SSPM1
UA
Bit 0
Reset
Values
on page
RBIF
49
TMR1IF
51
TMR1IE
51
TMR1IP
51
CCP3IF
51
CCP3IE
51
CCP3IP
51
TRISC0
52
TRISD0
52
—
52
50
SSPM0
50
BF
50
53
SSPM0
53
BF
53
DS39663A-page 192
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 2005 Microchip Technology Inc.