English
Language : 

PIC18F87J10 Datasheet, PDF (86/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology
PIC18F87J10 FAMILY
6.6 Writing and Erasing On-Chip
Program Memory (ICSP Mode)
While the on-chip program memory is read-only in
normal operating mode, it can be written to and erased
as a function of In-Circuit Serial Programming (ICSP).
In this mode, the TBLWT operation is used in all devices
to write to blocks of 64 bytes (32 words) at one time.
Write blocks are boundary-aligned with the code pro-
tection blocks. Special commands are used to erase
one or more code blocks of the program memory, or the
entire device.
6.7 Flash Program Operation During
Code Protection
See Section 23.6 “Program Verification and Code
Protection” for details on code protection of Flash
program memory.
TABLE 6-2: REGISTERS ASSOCIATED WITH FLASH PROGRAM MEMORY
Name
Bit 7
Bit 6 Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values on
Page
TBLPTRU —
—
bit 21 Program Memory Table Pointer Upper Byte (TBLPTR<20:16>) 49
TBPLTRH Program Memory Table Pointer High Byte (TBLPTR<15:8>)
49
TBLPTRL Program Memory Table Pointer Low Byte (TBLPTR<7:0>)
49
TABLAT Program Memory Table Latch
49
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used during program memory access.
DS39663A-page 84
Advance Information
 2005 Microchip Technology Inc.