PIC18F87J10 Datasheet, PDF(51/394 Page) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

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PIC18F87J10 Datasheet, PDF (51/394 Pages) Microchip Technology – 64/80-Pin High-Performance, 1-Mbit Flash Microcontrollers with nanoWatt Technology

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PIC18F87J10 FAMILY

TABLE 4-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS

Register

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets

WDT Reset

RESET Instruction

Stack Resets

Wake-up via WDT

or Interrupt

TOSU

TOSH

TOSL

STKPTR

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

---0 0000

0000 0000

0000 0000

00-0 0000

---0 0000

0000 0000

0000 0000

uu-0 0000

---0 uuuu(1)

uuuu uuuu(1)

uuuu uuuu(1)

uu-u uuuu(1)

PCLATU

PIC18F6XJ1X PIC18F8XJ1X ---0 0000

---0 0000

---u uuuu

PCLATH

PCL

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

0000 0000

0000 0000

0000 0000

0000 0000

uuuu uuuu

PC + 2(2)

TBLPTRU

PIC18F6XJ1X PIC18F8XJ1X --00 0000

--00 0000

--uu uuuu

TBLPTRH

PIC18F6XJ1X PIC18F8XJ1X 0000 0000

0000 0000

uuuu uuuu

TBLPTRL

PIC18F6XJ1X PIC18F8XJ1X 0000 0000

0000 0000

uuuu uuuu

TABLAT

PIC18F6XJ1X PIC18F8XJ1X 0000 0000

0000 0000

uuuu uuuu

PRODH

PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx

uuuu uuuu

uuuu uuuu

PRODL

INTCON

INTCON2

INTCON3

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

PIC18F6XJ1X PIC18F8XJ1X

xxxx xxxx

0000 000x

1111 1111

1100 0000

uuuu uuuu

0000 000u

1111 1111

1100 0000

uuuu uuuu

uuuu uuuu(3)

uuuu uuuu(3)

uuuu uuuu(3)

INDF0

PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

POSTINC0 PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

POSTDEC0 PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

PREINC0

PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

PLUSW0

PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

FSR0H

PIC18F6XJ1X PIC18F8XJ1X ---- xxxx

---- uuuu

---- uuuu

FSR0L

PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx

uuuu uuuu

uuuu uuuu

WREG

PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx

uuuu uuuu

uuuu uuuu

INDF1

PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

POSTINC1 PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

POSTDEC1 PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

PREINC1

PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

PLUSW1

PIC18F6XJ1X PIC18F8XJ1X

N/A

N/A

N/A

FSR1H

PIC18F6XJ1X PIC18F8XJ1X ---- xxxx

---- uuuu

---- uuuu

FSR1L

PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx

uuuu uuuu

uuuu uuuu

BSR

PIC18F6XJ1X PIC18F8XJ1X ---- 0000

---- 0000

---- uuuu

Legend:

Note 1:

2:

3:

4:

u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

See Table 4-1 for Reset value for specific condition.

ï£© 2005 Microchip Technology Inc.

Advance Information

DS39663A-page 49

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